1. Technical Field
A method for forming a metal line contact plug of a semiconductor device is disclosed, and more particularly, the disclosed method includes performing Chemical Mechanical Polishing (hereinafter, referred to as ‘CMP’) processes using (1) a first slurry solution having a high etching selectivity of metal/insulating film and (2) a second slurry solution having a low etching selectivity of metal/insulating film, thereby easily separating a metal line contact plug.
2. Description of the Related Art
Recently, device integration increases as improved integrated circuits are developed. For example, a device can comprise about 8,000,000 transistors per cm2. As a result, metal lines of high quality which enable devices to be connected are required for high integration. Such multi-layered lines can be embodied by efficiently planarizing dielectrics inserted between metal lines.
As a result, since a precise process of planarizing a wafer is required, CMP processes have been developed. During a CMP process, materials which need to be removed are chemically eliminated by using chemical materials which have good reactivity in CMP slurries. Simultaneously, the wafer surface is polished mechanically with ultrafine abrasives. A CMP process is performed by injecting a liquid slurry between the top surface of a wafer and a rotating elastic pad.
In addition, a noble line technique should be required for the multi-layered lines by using a metal CMP technique. A slurry used in the metal CMP process includes oxidizers for forming oxide films on the surface of metal and abrasives. When a metal is removed by a CMP process using the slurry, the metal surface is oxidized by oxidizers, and then the oxidized portion is mechanically polished and repeatedly removed by abrasives contained in the slurry.
Hereinafter, the conventional method for manufacturing a metal line contact plug of a semiconductor device will be explained with reference to the accompanying drawings.
FIG. 1a is a top plan view after forming a bit line pattern. FIG. 1b is a top plan view after etching a metal line contact plug. FIGS. 2a through 2d illustrate schematically conventional methods for manufacturing metal line contact plugs of semiconductor devices.
FIG. 2a is a diagram illustrating a condition wherein an interlayer insulating film is stacked on an A-A′ cross section of FIG. 1a. Bit lines 13 with mask insulating films 15 stacked thereon are formed on a semiconductor substrate 11. Here, the mask insulating films 15 are composed of nitride films with a thickness t1. Next, an interlayer insulating film 17 is formed on top surface of the resultant structure. The interlayer insulating film 17 is composed of an oxide film (see FIG. 2a).
FIG. 2b is a diagram illustrating a B-B′ cross section of FIG. 1b. A metal line contact hole 19 is formed by etching the interlayer insulating film 17 using a metal line contact mask as an etching mask. Here, a region “C” shown in FIG. 1b represents a region wherein the metal line contact hole 19 is formed by etching the interlayer insulating film 17 while a region “D” represents a region wherein the metal line contact hole 19 is not formed.
After depositing a predetermined thickness of an oxide film on top surface of the resultant structure, an oxide film spacers 21 are formed along the sidewalls of the metal line contact hole 19 and bit lines 13 are formed by blanket etching the deposited oxide film. Here, the thickness of the mask insulating films 15 on the bit lines 13 formed in the metal line contact hole 19 decreases to t2 due to etching processes to form the metal line contact hole 19 and to form the oxide film spacer 21 (see FIG. 2b).
Next, a metal layer 23 is stacked on top surface of the resultant structure. Here, the metal layer 23 has step coverage of t3 in the metal line contact hole 19 and of t4 from the mask insulating film 15 (see FIG. 2c).
As shown in FIG. 2d, a metal line contact plug 25 is formed by removing portions of the metal layer 23, the interlayer insulating film 17 and the predetermined thickness of the mask insulating film 15 using a CMP process. Here, in order that the metal line contact plug 25 is separated into P1 and P2 using the CMP process, a depth of t4 should be polished using a slurry to remove portions of the metal layer 23.
A polishing speed should be similar between films to remove the above multilayered films. However, a polishing speed of metal layers is over 20 times faster than that of oxide films when a CMP process is performed using conventional CMP slurry for metal to remove a metal. As a result, since a metal layer of a low step coverage is not removed easily due to slow polishing speeds of oxide films or nitride films, a metal line contact plug is not separated (see FIG. 2d), and an equipment vibration phenomenon is generated, resulting in deteriorating stability of the process.